1. Field of the Invention
The present invention relates to a data determination circuit for determining a value of data corresponding to a state of current in a data line for a semiconductor circuit and more particularly relates to a current mode sense-type data determination circuit for detecting a state of the current flowing in a drive circuit for a data line.
2. Description of Related Art
"Current mode transfer" is a method of transferring data in Large Scale Integrated circuits (LSIs). The circuit for this current mode transfer has a current to voltage conversion function and is capable of transferring the data with low amplitude and at high speed. This method has therefore been widely used in recent years and is used, for example, in sense amplifiers of semiconductor memory circuits. In the memory circuit, the data line and the drive circuit for driving the data line correspond to a bit line of a memory and a memory cell, respectively.
FIG. 1 is a circuit diagram showing a related example of a current mode sense amplifier. In FIG. 1, a P-type MOSFET (hereinafter referred to as PMOS) Trp31 and an N-type MOSFET (hereinafter referred to as NMOS) Trn31 are connected in series between a power supply VDD and one end of the bit line 31, i.e. the source electrode of the PMOS Trp31 is connected to the power supply VDD and the source electrode of the NMOS Trn31 is connected to an end of the bit line 31, with the drain electrodes of the PMOS Trp31 and NMOS Trn31 being connected in common to a node N31. A sense output is then taken from the node N31.
The gate electrode and drain electrode of the PMOS Trp31 are connected together in a so-called diode connection and the voltage-current characteristic of the PMOS Trp31 is equivalent to that of a resistance that is offset by the value of the threshold. A reference voltage Vref is applied to the gate electrode of the NMOS Trn31. A memory cell 32 is connected between the other end of the bit line 31 and ground GND. The memory cell 32 has a function of allowing current to flow toward the ground or not in the bit line 31 depending on the state of the stored data which has a value of, for example, "1" or "0".
In the sense amplifier of the above configuration, the case where the memory cell 32 allows a current I to flow toward GND will now be considered. In this case, a potential VBL of the bit line 31 falls, and the gate-source voltage Vgs of the NMOS Trn31 increases to increase the current of the NMOS Trn31, so that the drain-source voltage Vds decreases. Namely, the NMOS Trn31 exhibits a negative resistance characteristic where the applied voltage necessary for flowing the current is reduced with an increase of the current.
Since the PMOS Trp31 and the NMOS Trn31 exhibit characteristics of resistance and negative resistance, respectively, there exists the following condition: EQU Vds (Trp31)+Vds (Trn31).apprxeq.constant,
where there is little or no change in the potential of the bit line 31 depending on the presence or absence of the current I. The current to output voltage characteristic of this circuit is shown by a diagram in FIG. 2. In this characteristic diagram, VN31 is the potential of the node N31.
There are, however, the following problems with the sense amplifier of the above configuration as a related example. Firstly, it is difficult to suppress fluctuations in the potential of the bit line 31, if transconductance gm of the NMOS TraN31 is not large. Secondly, as becomes clear from the characteristic diagram of FIG. 2, the PMOS Trp31 exhibits a characteristic of a resistance that is linear. This causes the potential VN31 of the node N31 to make a transition with respect to the current I of the memory cell 32 with a certain extent of inclination that results in lowered sensitivity to the change in the current I.
Thirdly, the current in the PMOS Trp31 as a current source has to be made minute in order to reduce the power consumption of the sense amplifier system. For this purpose, the channel width of the PMOS Trp31 has to be made minute and the channel length has to be made large, with this having a possibility of occupying an extremely large surface area in some cases. The first problem is usually dealt with by the method described in the following as another related example with reference to FIG. 3 showing a circuit configuration therefor.
In FIG. 3, portions that are the same as portions in FIG. 1 are given the same numerals. The circuit configuration is the same as that in FIG. 1, with the exception that a bias circuit 33 is inserted between the gate electrode of the NMOS Trn31 and the bit line 31. Here, the bias circuit 33 has a circuit configuration having a feedback function which rises the output potential as the potential VBL of the bit line 31 falls.
The operation of the circuit of sense amplifier in this another related example will now be described with reference to the waveform diagram of FIG. 4. When the potential VBL of the bit line 31 falls, the reference voltage Vref is raised to increase the current in the NMOS Trn31, so that the potential difference across the NMOS Trn31 is decreased and the fall in the potential VBL of the bit line 31 is halted. When the VBL of the bit line 31 rises, the reference voltage Vref falls to decrease the current in the NMDS Trn31, the flow of current into the bit line 31 therefore falls and rising of the potential VBL of the bit line 31 is halted.
As is apparent from FIG. 4, the potential VN31 of the node N31 makes a comparatively rapid transition to exhibit a good sensitivity with respect to the change in the current I.
The above described circuit operation brings about improvement with regards to the problem due to the small transconductance gm of the NMOS Trn31. However, when the circuit of the above configuration is adopted, the circuit voltage has to be in a range where the bias circuit 33 operates sufficiently and this will cause increases in the power consumption of the bias circuit 33 and the current consumed by the memory cells 32. Further, it is necessary to add this bias circuit 33 to all sense amplifiers and, for multi-bit sensing, this will therefore results in undesirable increases in the surface area and power consumption.